Digital Test Methods

Duration: 3-days  - Cost: $1,200

 

Course Summary

 

In this three days intensive course, TTT provides an in depth coverage of Digital Test Methodology.

The course begins with an introduction to testing and explains the concepts of modern ATE and the techniques used to implement the electrical tests.

A simple device is used as a vehicle to explain each datasheet parameter with test procedures, actual measurements, debugging tips, data validation, test time reduction and characterization.

 

Laboratory exercises are included in the CD of VOL II. The software simulation is available to promote the learning experience through hands on.

 

Who should attend?

All engineering professionals who interface directly or indirectly with Automatic Test Equipment like Advantest, Agilent, Credence, LTX, Teradyne, and Schlumberger etc.

 

Course Outline VOL I

 

§         Chapter 1:   Introduction to Digital Testing

Overview, Quality, Measure of Quality, What Constitutes a Failure? Quality Assurance, Reliability, Measure of Reliability, Problem, Reliability Assurance, Quality vs. Reliability, Example, Integration, Example, The Steps of IC Manufacturing process, Test Engineering, Data and Information, Example, Data Validation, Debugging, Test Time Reduction, Test Engineering Responsibilities and Skills, Summary, Knowledge Review

 

§         Chapter 2:  Tester Overview

Introduction, Tester Hardware Overview, Software Overview, Test Program Operation, Test Program Entity, Test Program Execution, Test Program Flow, Tester to DUT Interface, Summary, Knowledge Review.

 

§         Chapter 3:  Functional Tests

Overview of Function Test, Function Test Types, Function Test Components, Pin Configuration File, Levels, Device Power Up, Device Pin Types, Programming Requirements of Each pin Type, Input Levels, Where Levels are Stored, Output Levels, IO Levels, Power Pins, Example, Levels Procedures, The DPS Window, The Levels Window, Levels Power-up Guidelines, Power Down Issues, Tester Reset Routine, Debug, Knowledge Review.

 

§         Chapter 4:  Test Patterns                                                                 

Pattern Generation, Pattern Load, Vector Memory Architecture, Main Memory, Subroutine Memory, Sequencer Memory, Scan Memory, Capture Memory, Algorithmic Pattern Generator (APG), Pattern Structure, Headers, Timing and Formatting Links, Vectors, Miscellaneous Commands Controls, Example, Functional Data and Control Data, Functional Data Format, Example, Vector Design, Exercise.

 

§         Chapter 5:  Timing and Wave Shape

Overview, Input Timing, Formatting, Timing and Formatting Relationship, Output Timing, Output Formatting, Programming the Timing, Example, Creating Complex Waveforms, What is a Timing Set?, Datasheet Waveforms and Programmed Timing, Example, Programming Steps, Using Timing Equations, The Six Steps for Using Equations, Knowledge Review.

 

§         Chapter 6:  Function Test Execution

Functional Test Execution and Controls, The Pipeline, Functional Test Modes, Match Mode, Continuous Mode, Mask Operations, Data log and Capture Memory Modes, Debugging the Functional Test, Levels Failures, Pattern Failures, Timing and Formatting Failures, Validating Function Test, The Five Rules for Function Test Validation, Knowledge Review, Lab.

 

§         Chapter 7:  AC Tests

Overview, Calibration, Round Trip Delay (RTD), Cables and Load Board Calibration, Thresholds, Pin Input Capacitance, AC Parameters Organization, Quick Reference Tables for AC Parameters, Exercise, Data Sheet, AC Loads, Knowledge Review.

 

§         Chapter 8:  AC Measurements         

Overview, AC Go-no-go, AC Read & Record, Search Algorithms, The Six Provisions to the Search Routines, Linear Search, Advantages, Disadvantages, Linear Search Example, Binary Search and Example, Advantages, Disadvantages, Linear/Binary Search and Example, Advantages, Disadvantages, Search Issues, Knowledge Review.

 

§         Chapter 9:  AC Debug & Validation

Plots, Understanding Plots, Example, Exercise (1), Exercise (2), Answer, Tracking Parameters, ASCII Plots, Linear/Edge Search, Oscilloscopes, Debugging AC, Validating AC, Exercise, Knowledge Review, Lab.

 

§         Chapter 10: Tester DC Resources

Overview, DPS, Kelvin Connection Operation, Parallel DPS, The Relationship of the DPS to the DUT, PMU, Voltage Force / Current Measure, Current Force / Voltage Measure, PMU Go-no-go, Practical Considerations, Rules of the PMU, Current Direction, Pin Electronics, Understanding the DC Specification, Dissection of the DC Parameters, Datasheet Examples, What the Datasheet does not Provide, Datalogging, Chapter Summary, Knowledge Review.

 

§         Chapter 11: Continuity Tests

Overview, Continuity Test Names, Example 1, Example 2, Test Methods, Static Method, Static Test Procedure, Setting the Levels, Timing & Function Test, Setting the PMU, Determining the Number of Tests, Sample Datalog, Functional Method, The Functional Test Procedure, Levels, Pattern, Pattern Example, Timing, Test Time Reduction, Which Continuity Method to use, What Continuity Tests do not Check, Debugging, Knowledge Review, Lab.

 

§         Chapter 12: Leakage Tests

Overview, Test Methods, Leakage Test Procedure, Setting the Levels, Setting the Timing and Pattern, Executing the Functional Tests, DC Static Measurement, Sample Datalog, Test Time Reduction, Considering the Tester Resources, Gang and Parallel Tests, Debugging, Validation, Characterization, Knowledge Review, Lab Exercise,

 

§         Chapter 13: VIL-VIH Tests

Overview, Vin and Vout, Test Methods, The Datasheet, Vin Test Procedure, Levels, Setting the Timing, Executing Function, Alternate Test Procedure, Debugging, Validation, Characterization, Knowledge Review.

 

§         Chapter 14: VOL-VOH Tests

Overview, The I-V relation of the Saturated MOS, Test Methods, The Datasheet, Functional Test Flow, Programming the PE, VOL/VOH Test Procedure, Levels, Timing and Pattern, Executing the Function Tests, DC Static Measurement, Static and the Functional Test Methods, Datalog of VOL/VOH, Using Search, Test Time Reduction, Debugging, Determining if the DUT has Dynamic Logic, Dynamic Output and Single Shot Signal Test?, Test Validation, Invalid Search Measurements, Characterization, Guidelines, Search Parameters and Setup Conditions, Plots, Temperature effect on Output currents, Knowledge Review,  Lab.

 

§         Chapter 15: IDD Dynamic Test

Overview, Variables Related to the Supply Current, Effective Capacitance CE, Effective Operating Frequency FE, Output Rise and Fall Times, Decoupling Capacitors, Pattern, Background Currents, Test Methods, Datasheet, IDD Test Procedure, Setting the Levels, Setting the Timing and Pattern, Executing the Function Tests, Sample Datalog, Debugging, Test Validation, Test Time Reduction, Knowledge Review.

 

§         APPENDIX

IDDQ, Data Sheet 74HCT238, Data Sheet 74ACT299, Glossary of Terms

 

     

 

About TTT                                            

Test Technologists Team is founded in 1978 and is an association of Test Engineers who have been involved in test program development, training as well as technical writing for many years. Our training courses are taught to ATE customers around the world.

 

Partial Customer List

AMD, AMI, Amkor, Credence, HP, Intel, LSI Logic, LTX, Lucent, Motorola, Schlumberger, SGS-Thompson, Tadiran, Teradyne, Zilog, ...

 

For more details visit our web site www.ttt.com and download a course chapter for review.